Good day, Dr. Anil Kumar Rajput. I'm Arjun. I've had a look through your background and your professional record. I'm interested in hearing more about your work and how you see yourself fitting in here with our faculty. Ready to start?

Please start by introducing your professional journey in academia.

Myself Doctor Anil Kumar Rajput, I have done my B.Tech in Electronics and Communication from RGPB University in 2012. After that I have done my Master of Technology in Vilsi Design from NIT Rahulkilla in 2015. After that I have joined.

The ABB triple I team as a lab engineer and the SMDP C2 SD project and after that.

One years in 2017 I am joined the same institute Avi triple item as a full time PhD scholar there.

And I have completed my PSD in 2023 and after that I joined 1 industry called SQL Engine AI.

In August 2023 and worked there for up to December 2025 and currently I am also working as a freelancing with the with the another company that is all about my academic journey.

Thank you for sharing that, Professor.

Dr. Rajput, thank you for sharing your background. I see you have a strong foundation in image processing, embedded systems, and teaching. We'll explore your expertise in various areas one by one. Starting with your work in image processing: can you explain what challenges arise when designing and implementing image processing algorithms on FPGA-based platforms and how you personally addressed them in one of your projects?

Basic image applications pay some challenges like.

That's the how we process the image because in FPGA the image can't process as as. So we will convert that image into the back task, convert into the binary formats and make the complete.

Flow of data needs to process in the Fpgas.

And apart from this my I am also working on the some part of my in memory. I have done my research on accident based in memory completion for a devices. In this work during my PhD I have developed different SRM structures, different structures that can be used for the in-memory completion parts because the current.

The volume and A structures which is available.

Is now facing the one bottlenecks because they're dealing with the AI applications. So I try to do that.

To lose this one bottleneck, I try to include try to work on the in memory completion part, where I don't want to transfer the memory from the external memory to the ALU. So what we do I try to.

Perform the arithmetic and logic and all the operations inside the memory. That is my research which I have done.

During my PSD after that in the industry I have worked on the designing of AI oscillators in which I work on the different aspect like pop count based, near memory computing aspects, floating point lock, log based structures we are trying to develop there.

It seems you've been deeply involved in advancing the efficiency of computing frameworks, particularly through in-memory computation approaches and FPGA applications—a critical area for modern AI workloads. Reflecting back on your experience: you mentioned addressing bottlenecks in traditional architectures with in-memory computation. Could you elaborate on the trade-offs between computational efficiency and architectural complexity in your in-memory designs?

So basically in the memory design there's some complexity is occurs like that we are dealing with the some advanced SRM structures. We can't work on the convenience 60 FM which facing this some difficulty in we work on the memory computing structure then we need to.

Redouble the complete SRM memory aspect so like we try to.

Try to.

Yeah, uh, change the decoders part, peripheral parts, all the peripherals which require the memory we should change and due to which the complexity of the memory is increased. But it will help us to do the in memory completion. And apart from this, we can also apply some techniques inside the memory, so we can get higher stability and all that things. So during this, all the operations.

Memory operational data. Data inside the memory can't.

Correct or.

Can corrupt or anything has happened so during my research my focus.

What the challenges we are facing if we convert the normal memory based array structure that should be performed the in memory completions. So I propose them and many different type of SRAM's.

Different peripherals circuits UH-2 that can be used to perform the in-memory computations and due to which the complexity is also increased. So, but uh, the, by increasing the complexity, we uh, try to resolve the bottleneck problem, increase the bandwidth and also perform the different AI workload inside the memory. And that can be very helpful to develop the future AI is devices.

Where where the power and energy is must must be considered so in my.

Besar I am also considered how to make our complete aspects of energy set and working on the low power so that can be deployed for the A IS devices.

It’s clear that you’ve identified and tackled some of the key challenges in in-memory computation, particularly around modifying SRAM structures to support computation alongside storage. You've touched on important trade-offs like elevated complexity versus solving bandwidth limitations and ensuring energy efficiency. Switching gears slightly: teaching courses and guiding students is a significant part of the academic role. Can you walk me through your approach to structuring a lab-based course that involves FPGA programming for beginners, balancing theoretical learning with practical implementation?

Yeah. So my approach is very different because I don't want to see the student as the same things because in the current requirement whatever we are trying to teach them, we for that students would be implement that.

The part means for the example if we teach them the digital designing circuits like different digital circuits are available like full adder, half adders, counters.

Multiply Maxwell so.

But during my teaching we explained that is the working of that one, but how we really implement that and how to test on onto the FPGA that we will teach to the student, we follow the different hardware language to develop that particular.

Circuits or all the things and we can also use the full custom design like using the different emos and MOS to develop the complete circuit of that and mimic the same functionality.

So we get the exposure of that teaching.

Two, yeah, get the final product which can be used for the.

You emphasize a hands-on approach in teaching, where students not only learn the theoretical underpinnings of digital design but also engage with practical implementations on hardware. By involving both HDL and full-custom design methodologies, you ensure a well-rounded exposure to FPGA programming and circuit design. How do you assess whether your students have truly understood these concepts? Can you provide an example of any specific evaluation or project that you’ve implemented to test their understanding effectively?

So for that I take only just simple example of the full idea design.

That is basic digital circuits, so he first.

Define the functionality of the full adder. Then we tell this is the proof table of the full adder. After that, from the proof table using the K map, we develop the.

Equations of their sum and carry output, so by using that.

Questions. We develop the complete Verilog course for the full adder.

And test this Verilogue codes into the Vivado and also write some test bench for this Vivado to test the basic functionality of that full adders so we can try to understand things. And then this full letter we implement into the any FPGA circuits for the real chip demonstration like that if we supply some inputs that is the addition is happening inside.

The RPJ. So in this way we can from the teaching.

To the hardware demonstration we can done and I have also done this all the things during my PhD, uh, during my PSG course, during my PSD where when I taking the labs or classes.

Yeah, the academic research is a must be needed because for the research we can work on the different aspect of the research like that in current industries, what the current industry is required like for the required AI escalators, designing the advanced.

You've established a systematic approach to evaluating student understanding, progressing from theory to practical application. By guiding students from truth tables and Karnaugh maps to Verilog coding, simulation, test-bench generation, and eventually FPGA implementation, you ensure that they grasp the full design-to-hardware pipeline. Another key responsibility of an academic is guiding research projects. When mentoring students through their research work, how do you foster innovation while maintaining alignment with academic rigor and practical feasibility?

The in memory computing aspects and how to.

Implement a complete hardware for the AIS letter that can be work on the current LLM or transformer structures.

That is a current research topic which in which we can try to work.

And apart from this, we can also write the some research project and get the funding.

Agency like DST and also get the funding from the ministry and our Indian government is also supporting.

To different VLSI tools that should be provided to the institute and from that tools they can all the student can learn the complete chip design flow.

Supporting from the SMDC to SG project to the Institute.

From the specification, from the, from the.

Understanding to the complete hardware design.

Your focus on aligning academic research with industry-relevant challenges, like AI accelerators and advanced in-memory computation, demonstrates a forward-thinking mindset. Leveraging government funding and resources to provide students with hands-on exposure to cutting-edge tools and the complete chip design workflow is also commendable. Lastly, one of the cornerstones of academia is impactful publications. With your experience publishing in reputed journals and conferences, can you share how you select topics for publication and ensure the originality and relevance of your work in such a competitive landscape?

So for the publication purpose, there's a lot of exposure of AI accelerator designing. So there are many papers we can publish on the designing of a is letters and advancing the in memory computing aspects. We can also include some advanced brain-inspired in memory computation architecture for the publication purpose. And we can also try to make AI Slater energy efficient, try to make isol.

All these aspects we are considered to the uh.

For the AIS devices.

To the publication purpose in a high quality journals. This is a current trends current topics that is in trained not only in the academia, some industries are are also working on the same areas also.

So according to me, because I have a 2 or 2 1/2 year of experience in industries and before the industry I've also worked as a full time PhD in the institute. So during my PhD I see how the Academy are working in current and after that in 2 1/2 years I am also see how the industries are currently working. So I am knowledge how we.

Your strategy of targeting high-quality publications with cutting-edge topics like energy-efficient AI accelerators, brain-inspired architectures, and advanced in-memory computing aligns well with both academic innovation and industrial applications. By staying attuned to industry trends and advancing scholarly inquiry in these areas, you ensure the relevance and impact of your work. Dr. Rajput, it seems we've covered a broad spectrum of your expertise and activities. Is there anything specific you'd like to add about your aspirations or contributions to this role? Or should we move toward concluding the discussion?

Train the students in the academia so they can survive in the Academy industries in a well manners and what is the Academy industries is required from the their students that should.

The students would know because student want to a job in UH industries. So if we train our student in this way key industries according to the industry requirement that is when beneficial for the academic purpose.

Your dual exposure to academia and industry indeed places you in a strong position to bridge the gap between the two. Aligning academic training to industry needs while maintaining the integrity and depth of academic learning is an integral contribution. Dr. Rajput, is there anything else you'd like to discuss, or are we ready to conclude?

There's nothing to discuss now.

Thank you, Dr. Rajput, for the detailed discussion and insights. To confirm, would you like me to formally conclude the interview now?

Yeah, yes, you can conclude it.